Efficient write cache staging of multi-channel stream appendices

ABSTRACT

A method of recording data received as part of a multi-channel data stream includes writing a first subset of initially-received channel segments of a multi-channel stream to corresponding main store locations instead of a write cache while writing a second subset of initially-received channel segments of the multi-channel stream to a write cache instead of corresponding main store locations. The method further provides for writing continuation segments associated with the first and second subsets of the initially-received channel segments to the write cache and flushing a collection of same-channel segments out of the write cache responsive to a determination that the same-channel segments satisfy a coalescence condition.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application is a continuation of U.S. patent applicationSer. No. 16/107,863, issued as U.S. Pat. No. ______, filed on Aug. 21,2018 and entitled “Efficient Write Cache Staging of Multi-Channel StreamAppendices,” which is hereby incorporated by reference for all that itdiscloses or teaches.

BACKGROUND

In some applications, storage devices receive and store multi-channeldata streams that include sequentially intermixed packets of data ofdifferent data channels. For example, a digital video recorder (DVR) maybe programmed to receive a data stream that includes packets of data formultiple different channels (e.g., TV channels). In hard drive deviceswith moving parts, performance may be negatively impacted whenintermixed channel segments of a multi-channel data stream are writtenaccording to a sequential order of receipt, as this may entail excessiveseeks of an actuator arm to disparate storage media locations associatedwith different data channels. In these devices, write throughput may beimproved by re-ordering writes to increase the time that the actuatorarm spends writing to sequential physical data blocks. However,re-ordering writes poses a burden on caching resources.

BRIEF DESCRIPTIONS OF THE DRAWINGS

FIG. 1 illustrates an example storage system that implements efficientcache staging techniques to increase write throughput when recordingdata received as part of a multi-channel data stream.

FIG. 2A illustrates a storage device receiving and recording initialdata segments of a multi-channel stream as part of an example processfor efficient write cache staging.

FIG. 2B illustrates the storage device of FIG. 2A performing a datarecordation operation during the example process for efficient writecache staging.

FIG. 2C illustrates the storage device of FIG. 2A-2B performing anotherdata recordation operation during the example process for efficientwrite cache staging.

FIG. 2D illustrates the storage device of FIG. 2A-2C performing yetanother data recordation operation during the example process forefficient write cache staging.

FIG. 2E illustrates the storage device of FIG. 2A-2D performing stillanother data recordation operation during the example process forefficient write cache staging.

FIG. 2F illustrates the storage device of FIG. 2A-2E performing stillanother data recordation operation during the example process forefficient write cache staging.

FIG. 3 illustrates example caching operations for increasing writethroughput when recording data received as part of a multi-channel datastream.

SUMMARY

A method of efficient cache staging for recording data received as partof a multi-channel data stream includes writing a first subset ofinitially-received channel segments of a multi-channel stream tocorresponding main store locations instead of a write cache whilewriting a second subset of initially-received channel segments of themulti-channel stream to a write cache instead of corresponding mainstore locations. The method further provides for writing continuationsegments associated with the first and second subsets of theinitially-received channel segments to the write cache and flushing acollection of same-channel segments out of the write cache responsive toa determination that the same-channel segments satisfy a coalescencecondition.

This Summary is provided to introduce a selection of concepts in asimplified form that are further described below in the DetailedDescription. This Summary is not intended to identify key features oressential features of the claimed subject matter, nor is it intended tobe used to limit the scope of the claimed subject matter. These andvarious other features and advantages will be apparent from a reading ofthe following Detailed Description.

DETAILED DESCRIPTION

FIG. 1 illustrates an example storage system 100 that implementsefficient cache staging methodology to increase write throughput whenrecording data received as part of a multi-channel data stream 114. Thestorage system 100 includes a storage device 102 including a storagemedium 108 and a storage controller 106. During recording operation, thestorage device 102 receives the multi-channel data stream 114 from ahost system. In one implementation, the host system is a broadcastprovider such as a satellite, cable TV, or other broadcast provider thattransmits multiple different data channels (e.g., of digital media) inthe multi-channel data stream 114. As used herein, a “channel” refers toan individual stream of data which may be included within amulti-channel data stream. In the case of digital content channels, acontinuous portion of an individual channel can be viewed and/orlistened to when the channel data is read back from the storage medium108 according to a defined order (e.g., a sequential order of receipt).A digital content item is, for example, a data stream including videoand/or audio data, such as a movie, TV show, commercial, audio clip,etc.

In the following disclosure, two channel segments of a same channel arereferred to as “continuous channel segments” if one of the channelsegments appends to data of the other channel segment (e.g., the twosegments are intended to be read and/or played consecutively when datais played back from the storage medium 108). In the event where thechannel segments include video data, data spanning two continuouschannel segments can be played back to view a continuous video segmentof a digital content item. Similarly, a first channel segment is said tobe a “continuation” or an “appendix” of a second channel segment, suchas a previously-received and/or recorded channel segment, if the secondchannel segment appends the data of the first channel segment, such aswhen the two channel segments include data of a same channel and/or asame digital content item and are intended to be read and playedconsecutively.

In one implementation, the multi-channel data stream 114 includes dataof multiple broadcast channels, such as different television channels ordifferent recorded streams of security footage from different securitycameras. For example, the storage device 102 may be included within adigital video recorder (DVR) or set-top box designed to record livebroadcasts of multiple channels and/or save on-demand content forsubsequent viewing by a user.

Although other implementations are contemplated, the storage medium 108is, in FIG. 1, a magnetic storage disk on which data bits can berecorded using a magnetic write pole and from which data bits can beread using a magnetoresistive element (not shown). The storage medium108 rotates about a spindle center or a disc axis of rotation 112 duringrotation and includes an inner diameter and an outer diameter betweenwhich are a number of concentric data tracks. Information may be writtento and read from data bit locations in the data tracks using read/writeelement(s) on a transducer head assembly 120, which is further mountedon an actuator assembly 104 at an end distal to an actuator axis ofrotation 115. The transducer head assembly 120 flies in close proximityto the surface of the storage medium 108 while the storage medium 108rotates about the axis of rotation 112. When reading data from orwriting data to various locations on the storage medium 108, theactuator assembly 104 rotates about the actuator axis of rotation 115 toposition the transducer head assembly 120 over a target data track.

The controller 106 of the storage device 102 includes software and/orhardware for implementing data access commands (e.g., read and writecommands) to targeted locations on the storage medium 108. To facilitateexecution of such commands, the controller 106 manages a mapping of hostlogical block addresses (LBAs) to corresponding physical data blocks onthe storage medium 108. The range of physical data blocks includedwithin the LBA mapping scheme is referred to herein as a “main store.”For example, FIG. 1 illustrates a portion of main store 110.

In one implementation, continuous channel segments within eachindividual channel of the multi-channel data stream 114 are associatedwith consecutively-accessible LBAs (e.g., consecutive LBAs mapped toconsecutive physical data blocks). For example, continuous segments of afirst channel are associated with LBAs 1010, 1020, 1030; continuoussegments of a second channel are associated with LBAs 2010, 2020, 2030;continuous segments of a third channel are associated with LBAs 3010,3020, 3030; and continuous segments of a fourth channel are associatedwith LBAs 4010, 4020, and 4030.

In these cases where the LBA numbering is consecutive across continuoussegments of individual channels, the segments arriving within themulti-channel data stream 114 may be of non-sequential LBA order. Forexample, the multi-channel data stream 114 includes intermixed channelsegments of data from four different channels—CH1, CH2, CH3, and CH4. Ifthese channels are individually assigned to the above-describedexemplary sequential LBA ranges, the storage device 102 receives thestream data according to a non-consecutive LBA order: 1010, 2010, 3010,4010, 1020, 2020, 3020, 4020, 1030, 2030, 3030, 4030. In systems whereconsecutive LBAs are mapped to consecutive physical data blocks, it isinefficient to write a non-sequential LBA stream such as this accordingto the order of data receipt because this causes the storage device 100to perform a large number of radial seeks moving the actuator arm 109 tothe various storage locations corresponding to the start LBA of eachchannel segment. This provides an incentive to increase the length ofeach LBA-consecutive write during recordation of the incomingmulti-channel data stream 114. For example, greater write throughput canbe realized when sequentially-received LBAs 1010, 2010,1020 aretemporally cached in memory, re-arranged, and written according to theLBA-consecutive order 1010, 1020, and 2010.

By rearranging and coalescing same-channel segments (also referred toherein as “stream appendices”) in the above-described manner, LBAslocated physically one another can be written sequentially to yield acorresponding decrease in the total time that the actuator arm 109spends seeking to the LBA location of each different channel segment.

The above-described performance benefits are, in many cases, dependentupon the existence of a write cache of sufficient size to accommodatestaging and coalescing of data from each different channel within themulti-channel data stream 114. The herein disclosed technology provideswrite cache staging techniques that permit for the use of a smallerwrite cache to support the staging and coalescing of an increased numberof data channels.

For purposes of this disclosure, it is assumed that the controller 106includes a mechanism for identifying which channels the individual datapackets within the multi-channel data stream 114 correspond to. It canbe appreciated that channel identifiers for the different incoming datapackets can be determined in several different ways. In oneimplementation, each different channel is pre-associated with a definedLBA range and the channel ID for a data segment can be determined basedon the host-specified LBA associated with the data segment. In anotherimplementation, a channel ID for each channel segment can be determinedbased on the size of the associated segment, such as in implementationswhere the different data packet sizes are used in association with eachchannel. In the same or another implementation, the channel segments arereceived according to an expected order. In the example of FIG. 1, thedata segments in the multi-channel data stream 114 are arrangedaccording to a repeated sequence (e.g., CH1, CH2, CH3, CH4, CH1, CH2,CH3, CH4, and so on) but may, in other implementations, be receivedaccording to a different order. In still other implementations, the datasegments within the multi-channel data stream 114 include headerinformation indicating a channel identifier for each data packet.

In the examples used herein, lower-case alphabetical letters (a, b, c,d, etc.) are used to denote a sequential index of each individualsegment within an associated channel stream. For example, CH1(a)represents an initially-received segment of channel 1, while CH1(b)represents a continuation segment that appends directly to CH1(a).Although not shown in FIG. 1, this notation may be continued such thatCH1(c) denotes a continuation segment of CH1(b), CH1(d) denotes acontinuation segment of CH1(c), and so on.

A first-received data segment associated with each data channel isreferred to herein as the “initially-received channel segment.” In FIG.1, the data segments CH1(a), CH2(a), CH3(a), and CH4(a) representinitially-received channel segments for each of the associated datachannels 1-4. As used herein, the term “initially-received channelsegment” may be used to refer to either an actual first-received datasegment for a particular channel or, alternatively, to a first-receivedsegment for the associated channel that occurs after a defined eventsuch as a temporary lapse in broadcast and/or receipt of themulti-channel data stream 114.

As each data segment of the multi-channel data stream 114 arrives at thestorage device 102, the data segment is placed into a volatile memorybuffer (not shown). A cache management tool 118 of the controller 106dynamically selects initial non-volatile storage locations for eachchannel segment according to the order that the channel segments arereceived within the multi-channel data stream 114.

In one implementation, the cache management tool 118 determines achannel ID associated with each received channel segment and alsodetermines whether that segment is an initially-received segment for theassociated channel ID. The cache management tool 118 selects a storagelocation for each initially-received channel segment (e.g., CH1(a),CH2(a), CH3(a) or CH4(a) based on the channel ID associated with eachchannel segment. If the associated channel ID identifies a channelincluded within a first predetermined subset of data channels, the datasegment is initially written to a storage location in the main store 110without first being recorded in a write cache 122. If, in contrast, theassociated channel ID identifies a channel included within a secondpredetermined subset of data channels, the data segment is written to astorage location in the write cache 122 rather than to the main store110. In various implementations, the write cache 122 may be eithervolatile (e.g., RAM, S-RAM, DRAM, etc.) or non-volatile (e.g., Flashmemory, EPROM, F-RAM, M-RAM, disk memory, etc.)

The above-described selective placement of the initially-receivedchannel segments in either the write cache 122 or the main store 110effectively sets-up a time-staggered channel staging and segmentcoalescence process, the benefits of which are described further below.

In one example of the above-described process, approximately half of theinitially-received data segments are directed to the main store 110while the other half are directed to the write cache 122. For example,the cache management tool 118 identifies CH1(a), CH2(a), CH3(a), andCH4(a) as initially-received channel segments of the associated channels(1-4). The cache management tool 118 determines that CH2 and CH4 areassociated with a first subset of channels and, based on thisdetermination, writes the segments CH2(a) and CH4(a) directly to themain store 110. Further, the cache management tool 118 determines thatCH1 and CH3 are associated with a second subset of channels and, basedon this determination, writes the segments CH1(a) and CH3(a) to thewrite cache 122 rather than the main store 110. After the first fourdata segments of the multi-channel data stream 114 are written, CH2(a)and CH4(a) reside in the main store 110 while the segments CH1(a) andCH3(a) reside in the write cache 122.

In other implementations, the proportion of initially-received channelsegments initially written to the main store 110 instead of the writecache 122 may be greater or fewer than half.

After the cache management tool 118 writes the initially-receivedsegment of each data channel (e.g., CH1(a), CH2(a), CH3(a), and CH4(a))to either the non-volatile cache 122 or to a corresponding location inthe main store 110, the storage device 102 begins to receivecontinuation segments for each of the channels. Based on an identifiedchannel ID and/or write history information, the cache management tool118 identifies each of these subsequently-received segments as being acontinuation segment that appends to an already-recorded channelsegment. The cache management tool 118 writes each of the continuationsegments in the multi-channel data stream 114 to the write cache 122.For example, the cache management tool 118 recognizes each of thesegments CH1(b), CH2(b), CH3(b) and CH4(b) as being a continuationsegment of an associated one of the initially-received segments CH1(a),CH2(a), CH3(a), CH4(a) and writes each of these continuation segments,in turn, to the write cache 122 (as shown).

As data begins to accumulate in the write cache 122, the cachemanagement tool 118 monitors cache contents to identify whethersame-channel data (for any channel) residing in the write cache 122satisfies a coalescence condition. In one implementation, thecoalescence condition is satisfied when there exists a threshold numberof same-channel segments residing in the non-volatile wrote cache 122.For example, channel 2 satisfies the coalescence condition when thereexist a threshold number of continuous channel 2 segments (e.g., CH1(a),CH1(b) residing in the write cache 122. In another implementation, thecoalescence condition is satisfied when a total amount of data residingin the cache exceeds a threshold.

Responsive to a determination that the coalescence condition issatisfied, the cache management tool 118 coalesces same-channel segmentsof a select channel into a single LBA-consecutive data segment andflushes this coalesced same-channel data segment out of the write cache122 and to corresponding LBA locations in the main store 110, freeing upspace within the write cache 122 for new incoming data. The “selectchannel” that is coalescence and flushed from the write cache 122depends on the defined coalescence threshold. If, for example, thecoalescence threshold is satisfied when same-channel segmentscollectively satisfy a threshold data quantity (or segment number), theselect channel is the channel that has same-channel segmentsindependently satisfying the coalescence condition. If, alternatively,the coalescence condition is defined as being satisfied when a totalamount of data (of all channels) residing the cache exceeds a threshold,the select channel may be the channel having the largest amount ofcontinuous channel data in the write cache 122.

In one implementation where the order of expected future segment arrivalis known (e.g., CH1, CH2, CH3, CH4, CH1, CH2, CH3″ rather than a randomorder), the select channel that is coalesced and flushed is the channelhaving an amount of channel data satisfying a threshold that is alsoexpected to be next appended to at a time that is furthest in thefuture. If, for example, segments are received in the order CH 1, CH2,CH3, CH4, CH5, CH6, CH7, CH8 and three of these channels have athreshold number of continuous channel segments in the write cache 122,the cache management tool 118 selects the channel that is expected tonext update at a time furthest in the future. Data of this selectchannel is coalesced and flushed to the main store 110, thus ensuringthat the freed space in the cache remains available for a longestpossible amount of time.

In some implementations, satisfaction of the coalescence conditiontriggers a coalescence and flush of same-channel segments of multipledifferent channels. If, for example, current available cache capacitydecreases below a set threshold, two or more channels having the largestquantity of continuous channel data may be selected, independentlycoalesced, and flushed from the write cache 122.

In one implementation, segments of coalesced same-channel data arewritten to the main store 110 in an LBA consecutive order. Consequently,the associated same-channel data can be read back continuously, such asto enable an ordered playback of single-channel data without performingany radial seeks of the actuator arm 109 except to enable normalswitches between adjacent data tracks.

The write cache 122 of FIG. 1 is shown storing six different datasegments (CH1(a), CH1(b), CH2(b), CH3(a), CH3(b), CH(2)(b)). This isintended to convey that these segments are—in this example—eachinitially written to the write cache 122 rather than their associatedLBA locations in the main store 110. Notably, these segments are notnecessarily stored simultaneously in the write cache 122. If, forexample, the coalescence condition is satisfied when there exist twocontinuous channel segments in the write cache 122, the write cache 122may not store all six of these segments at once. Rather, CH1(a) andCH1(b) may be coalesced and flushed out of the cache before CH2(b),CH3(b) or CH4(b) are received and/or written to the write cache 122.Thus, in this specific example with four data channels and a coalescencecondition satisfied by two continuous channel segments, the write cache122 may store no more than four channel segments at any given time. Inother examples where the coalescence conditions provide higherthresholds (e.g., 3, 4, 5, 6, etc. continuous channel segments) and/orgreater numbers of channels included within the multi-channel stream,the write cache may store greater than four channel segments at once.

Since some of the initially-received channel segments were placed in themain store 110 instead of the write cache 122 (e.g., segments CH2(a) andCh4(a) were written directly to the main store 110), the above-describedsame-channel segment coalescence is effectively staggered for differentdata channels. That is, the coalescence condition is satisfied soonerfor the data channels having initial data segments that were placed inthe write cache 122 (e.g., CH1, CH3) than for the data channels havinginitial data segments written directly to the main store 110 (e.g., CH2,CH4).

For example, in FIG. 1, two channel 1 segments (CH1(a) and CH1(b)) arewritten to the write cache 122 before any CH2 segments (e.g., becausethe initially-received CH2 segment (CH2(a)) is written to the main store110 instead). In the above example where the coalescence condition issatisfied by two continuous same-channel segments in the write cache122, the first two CH1 segments can therefore be coalesced and flushedfrom the write cache before the first channel segment of CH2 is placedin the cache. Likewise, if the coalescence condition is satisfied whenthere exist three continuous channel segments in the write cache 122three CH1 segments may be received and coalesced before the second CH2segment is initially placed in the write cache 122. No matter whatcoalescence condition is utilized, this channel-staggered cachingmethodology can be supported by a write cache with a smaller totalstorage capacity than a write cache needed to support a similarsame-channel coalescence methodology that does not stagger the initialplacement of data from different channels in the write cache.

As mentioned above, the storage controller 105 may flush same-channelsegments from the write cache 122 when a threshold number ofsimultaneously-cached same-channel segments satisfies a coalescencecondition In one implementation, the write cache 122 has a size that isinsufficient to simultaneously store this threshold number of datasegments (e.g., the number sufficient to satisfy the coalescencecondition) for all of the channels in the multi-channel stream 114. If,for example, the coalescence condition is two and there exist four datachannels within the multi-channel stream (as in the illustratedexample), the write cache 122 may be sized to store fewer than eight(e.g., two times four channels) of the data segments at once.

In general, performance of the storage device 102 increases inproportion to the average size of each write to the main store 110. Whenlarger chunks of data are coalesced within the write cache 122 prior toflushing, greater increases in performance are observed.

In an implementation with equal-sized channel segments that does notemploy the herein-described “staggering” of cache writes on the initialpass, an average write size of two segments is generally observed whenthe write cache 122 is sized to N channel segments, where N is thenumber of channels in the multi-channel data stream 114. In contrast,the same or similar average write size can be achieved using a muchsmaller write cache using the disclosed write cache staggeringmethodology (e.g., with staggering on the initial pass).

Depending on the coalescence condition and select size of the writecache 122, the disclosed caching techniques may lead to variableimprovements in device performance. In one example system implementingthe above-disclosed caching methodology, an average write size of twochannel segments is observed when the write cache 122 is sized to hold amaximum of N/2 segments of equal size, where N represents the number ofchannels in the multi-channel data stream 114. In still another examplesystem implementing the above-disclosed caching methodology, an averagewrite size of three channel segments is observed when the write cache122 is sized to hold a maximum of N segments of equal size. In yet stillanother example system implementing the above-disclosed cachingmethodology, an average write size of 2*m is observed for a write cache122 sized to hold m*N channel segments.

Notably, the controller 106 may include software or a combination ofsoftware and hardware and may be implemented in any tangiblecomputer-readable storage media within or communicatively coupled to thestorage device 100. The term “tangible computer-readable storage media”includes, but is not limited to, RAM, ROM, EEPROM, flash memory or othermemory technology, CDROM, digital versatile disks (DVD) or other opticaldisk storage, magnetic cassettes, magnetic tape, magnetic disk storageor other magnetic storage devices, or any other tangible medium whichcan be used to store the desired information, and which can be accessedby mobile device or computer. In contrast to tangible computer-readablestorage media, intangible computer-readable communication signals mayembody computer readable instructions, data structures, program modulesor other data resident in a modulated data signal, such as a carrierwave or other signal transport mechanism. The term “modulated datasignal” means a signal that has one or more of its characteristics setor changed in such a manner as to encode information in the signal.

FIG. 2A-2F illustrate a storage device 200 executing various steps of atime-staggered caching and data coalescence process that increases writethroughput when recording data received as part of a multi-channel datastream 202. In the examples illustrated by these figures, themulti-channel data stream 202 is shown to include intermixed segments ofchannel data associated with four different channels. Notably, fourchannels are shown for conceptual illustration and simplicity. Themulti-channel data stream 202 may, in other implementations, includefewer than or greater than four channels.

FIG. 2A illustrates a storage device 200 during a phase in which thestorage device 200 receives and stores an initial data segment for eachdata channel included in the multi-channel stream 202. As data packetsof the multi-channel data stream 202 are received at the storage device200, they are placed into a volatile memory buffer 216. A controller(not shown) of the storage device copies each of the segments—accordingto a sequential order of receipt—to a non-volatile storage location thatis either within a main store 210 of the storage device 200 or within awrite cache 208 of the storage device 200. In one implementation, thewrite cache 208 is a non-volatile memory cache separate from one or morestorage media including the main store 210. For example, the main store210 may be distributed across one or more magnetic disks and the writecache 208 may be located in DRAM or Flash memory.

As each channel segment (CH1(a), CH2(a), etc.) is received at thestorage device 200, the controller of the storage device determines achannel ID associated with the data segment and further identifieswhether or not the segment is an initially-received segment for theassociated channel. In the illustrated implementation, CH1(a), CH2(a),CH3(a), and CH4(a) each represent an initially-received data segmentsfor corresponding channels 1, 2, 4, and 4, respectively.

Responsive to identification of a channel segment as being aninitially-received segment for an associated data channel, thecontroller further determines whether the data segment is associatedwith a data channel belonging to a pre-identified subset of channels. Ifthe data segment is identified as belonging to the pre-identified subsetof channels, the controller initially writes the data segment to acorresponding location in the main store 210. If, in contrast, the datasegment is not identified as belonging to the pre-identified subset ofchannels, the controller initially writes the data segment to the writecache 122, effectively postponing an initial write of the data segmentto the main store 210.

In the illustrated example, channels 2 and 4 are included in thepre-identified subset of channels, while channels 1 and 3 are excludedfrom this pre-identified subset. Consequently, the controller writes theinitially-received segments CH2(a) and CH4(a) to corresponding locationsin the main store 210 (e.g., to locations statically or dynamicallymapped to host-assigned LBAs the controller). The initially-receivedsegments CH1(a) and CH3(a) are, in contrast, initially written to thewrite cache 208 in lieu of the main store 210.

FIG. 2B illustrates the storage device 200 during a data recordationoperation performed following the operations shown and described withrespect to FIG. 2A. Here, the storage device determines an initialnon-volatile storage location for a first continuation segment (CH1(b))received for channel 1 that is part of the multi-channel data stream202. In one implementation, the segment CH1(b) includes data thatlogically appends to data of the initially-received channel segment forchannel 1 (e.g., CH1(a)). The controller of the storage device 200recognizes the segment CH1(b) as being a continuation segment and, basedon this determination, records the segment CH1(b) within the write cache208.

Following the write of the segment CH1(b) to the write cache 208, thecontroller assesses the contents of the write cache 208 and determineswhether same-channel data residing in the write cache 208 satisfies acoalescence condition. In different implementations, the coalescencecondition may be satisfied by different criteria. In one implementation,the coalescence condition is satisfied when there exist a predeterminednumber of channel segments for any individual channel simultaneouslyresiding in the write cache 208. In another implementation, thecoalescence condition is satisfied when there exists a predeterminedquantity of data of any one channel simultaneously residing in the writecache 208 irrespective of the number of individual data segments suchdata corresponds to. In yet another implementation, the coalescencecondition is satisfied by impending overflow of write cache capacity.For example, a largest continuous channel set may be flushed from thewrite cache 208 when a total amount of cached data exceeds a threshold.If there exist multiple channel sets of equal size, the channel setselectively flushed may, in some implementations, be the channel set forthe next segment is expected to arrive the furthest in the future.

In the example illustrated in FIGS. 2A-2F, the coalescence threshold istwo; however, the coalescence threshold may take on different valuesgreater than two in different implementations. Further, the example ofFIGS. 2A-2F implements an identical coalescence threshold for each ofthe different channels. Notably, however, some implementations of thedisclosed technology may implement different coalescence thresholds fordifferent channels.

This may be the case when, for example, data packets of differentchannels are of unequal size.

Following the placement of the segment CH1(b) in the write cache 208,there exist two continuous CH1 segments in the write cache 208. In thisexample, the exemplary coalescence threshold of two segments is nowsatisfied. Consequently, the same-channel continuation segments (CH1(a)and CH1(b)) are flushed out of the write cache 208 and written tocorresponding LBA locations in the main store 210. In oneimplementation, the flushing of the same-channel continuation segmentsis performed by executing a single continuous write operation thatwrites the associated data according to physical data blocks accordingto a consecutive LBA order. For example, the data segments CH1(a) andCH1(b) are written to the main store 210 in a write operation that isperformed without any radial seeks of an actuator arm except to enablenormal switches between adjacent data tracks.

Following the flush of the continuation segments CH1(a) and CH1(b) tothe main store 210, the channel segment CH3(a) is the sole channelsegment residing in the write cache 208 that has not yet been copied toits corresponding LBA location in the main store 210.

FIG. 2C illustrates the storage device 200 during data recordationoperations performed following the operations shown and described withrespect to FIG. 2B. Here, the storage device determines initialnon-volatile storage locations for the next three sequentially-receivedchannel segments (CH2(b), CH3(b), CH4(b) that are included within themulti-channel data stream 202 and pending in the volatile memory buffer216. Responsive to a determination that these segments are continuationsegments (as opposed to initially-received channel segments), thecontroller selectively writes each of these segments to the write cache208 in the order that the segments are received as part of themulti-channel data stream 202 (e.g., the order CH2(b), CH3(b), andCH4(b)).

Following the write of the segment CH3(b) to the write cache 208, thecontroller determines that the number of LBA-continuous CH3 segmentsresiding in the write cache 208 satisfies the coalescence threshold.Consequently, the same-channel continuation segments (CH3(a) and CH3(b))are flushed out of the write cache 208 and written to corresponding LBAlocations in the main store 210. The other two newly-written segments(Ch2(b) and CH4(b)) remain within the write cache 208.

FIG. 2D illustrates the storage device 200 during data recordationoperations performed following the operations shown and described withrespect to FIG. 2C. Here, the storage device determines initialnon-volatile storage locations for the next two sequentially-receivedchannel segments (CH1(c) and CH2 (c)) that are included within themulti-channel data stream 202 and pending in the volatile memory buffer216. Responsive to a determination that these segments are continuationsegments that append data to earlier-written channel segments, thecontroller selectively writes each of these segments to the write cache208.

Following the write of the segment CH2(c) to the write cache 208, thecontroller determines that a current number of continuous CH2 segmentsresiding in the write cache 208 satisfies the coalescence threshold.Consequently, these same-channel continuation segments (CH2(b) andCH2(c)) are flushed out of the write cache 208 and written tocorresponding LBA locations in the main store 210, freeing up additionspace in the write cache 208. Following this flush, the segments CH1(c)and CH4(b) remain in the write cache but have not yet been copied tocorresponding permanent storage locations in the main store 110.

FIG. 2E illustrates the storage device 200 during data recordationoperations performed following the operations shown and described withrespect to FIG. 2D. Here, the storage device determines initialnon-volatile storage locations for the next two sequentially-receivedchannel segments (CH3(c) and CH4(c)) that are included within themulti-channel data stream 202 and pending in the volatile memory buffer216. Responsive to a determination that these segments are continuationsegments, the controller selectively writes each of these segments tothe write cache 208.

Following the write of the segment CH4(c) to the write cache 208, thecontroller determines that a current number of continuous CH4 segmentsresiding in the write cache 208 satisfies the coalescence threshold.Consequently, these same-channel continuation segments (CH4(b) andCH4(c)) are flushed out of the write cache 208 and written tocorresponding LBA locations in the main store 210. The continuationsegments CH1(c) and CH3(c) remain in the write cache 208.

FIG. 2F illustrates the storage device 200 during data recordationoperations performed following the operations shown and described withrespect to FIG. 2E. Here, the storage device determines initialnon-volatile storage locations for the next four sequentially-receivedchannel segments (CH1(d), CH2(d), CH3(d), and CH4(d)) that are includedwithin the multi-channel data stream 202 and pending in the volatilememory buffer 216. Responsive to a determination that these segments arecontinuation segments (as opposed to initially-received channelsegments), the controller selectively sequentially writes each one ofthese four segments to the write cache 208.

Following the write of the segment CH1(d) to the write cache 208, thecontroller determines that a current number of continuous CH1 segmentsresiding in the write cache 208 again satisfies the coalescencethreshold. Consequently, the segments CH1(c) and CH1(d) are flushed outof the write cache 208 and written to corresponding LBA locations in themain store 210. Likewise, following the write of the segment CH3(d) tothe write cache 208, the controller determines that a current number ofcontinuous CH3 segments residing in the write cache 208 satisfies thecoalescence threshold. Consequently, the segments CH3(c) and CH3(d) areflushed out of the write cache 208 and written to corresponding LBAlocations in the main store 210. At this point in time, the segmentsCH2(d) and CH3(d) are the only segments in the write cache 208 that havenot yet been copied to their corresponding, permanent locations in themain store 210.

The above-described cache staging and flushing of coalesced same-channelsegments may be continued until all data of the multi-channel datastream is stored in non-volatile memory. In this example, each of thewrites to the main store 210 has a size of two channel segments exceptfor the initial writes (discussed with respect to FIG. 2A), which have asize of one channel segment. The average write size is, over time, twochannel segments even if the write cache 208 is not large enough to holdN segments, where N is the number of channels in the multi-channelstream 202. (Note, in the illustrated example, the write cache 208 issized to hold a maximum of 2 segments nominally (N/2 when the number ofchannels N, is 4). In addition to the nominal write capacity of N/2, twoadditional segments are needed to support the instantaneous capacityshown in FIG. 2D (wherein CH(1) has arrived, followed by the arrivalwith flush for CH2(b) and CH2(c), after which the write cache 208 againstores the nominal number of segments, N/2). For larger N, theinstantaneous maximum requirement of N/2+2 may be typically expressed asN/2.

FIG. 3 illustrates example caching operations 300 for increasing writethroughput when recording data received as part of a multi-channel datastream. A receiving operation 305 receives a segment of themulti-channel stream and identifies a channel associated with thesegment (referred to below as “the associated channel”). A determinationoperation 310 determines whether the received segment is aninitially-received segment for the associated channel.

If the determination operation 310 determines that the received segmentis an initially received segment for the associated channel, anotherdetermination operation 315 determines whether the associated channel isincluded in a predefined subset of channels. If the associated channelis included within the predefined subset of channels, a writingoperation 320 writes the segment directly to its corresponding LBAlocation in the main store without writing the segment to the writecache. If, in contrast, the determination operation 315 determines thatthe associated channel is not included in the predefined subset ofchannels, a writing operation 325 writes the segment the write cache(and not yet to its corresponding main store location).

In one implementation, the “predetermined subset of channels” includeschannels corresponding to alternating (e.g., every-other) segment in themulti-channel stream. For example, the predetermined subset of channelsmay include even-numbered channels or odd-numbered channels. In thiscase, half of the initially-received channel segments are directed tothe main store (e.g., the odd channels), while other half of theinitially-received channel segments are directed to the write cache(e.g., the even channels).

If the determination operation 310 determines that received segment isnot an initially-received segment for the associated channel (e.g., thesegment is a continuation segment of a previously-received segment), thewriting operation 325 writes the received segment to the write cache.Thus, in one implementation, all continuation segments are written tothe write cache.

Following the write of the received segment (by either write operations320 or 325), a determination operation 330 determines whether acoalescence condition is satisfied for the associated channel by datacurrently stored in the write cache. In one implementation, thecoalescence threshold is satisfied when there exist a threshold numberof continuous segments for the associated channel residing in the writecache. In another implementation, the coalescence threshold is satisfiedwhen there exists a threshold quantity of data in the write cache, suchas when the write cache has a remaining available capacity that is equalto or less than a set threshold.

If the determination operation 330 determines that the coalescencecondition is satisfied, a selection operation 335 selects a channel tocoalescence and flush from the write cache. In an implementation wherethe coalescence condition is satisfied when there exists a thresholdquantity of same-channel data residing in the write cache, the selectionoperation 335 selects the channel for which the cached same-channel datasatisfies the threshold. In still another implementation where thecoalescence condition is satisfied when a total quantity of cached dataexceeds a threshold, the selection operation 335 may select the channelwith the largest amount of cached channel data and/or the channel thatis expected to update the furthest in the future.

Following the selection operation 335, a flushing operation 340 flushessame-channel segments of the selected channel from the write cache totheir associated main store LBA locations, thereby freeing up storagecapacity in the write cache. If the determination operation 330determines that the coalescence condition is not satisfied by the dataresiding in the write cache, the selection operation 335 and theflushing operation 340 are skipped. In either case, a proceedingoperation 345 proceeds back to the receiving operation 305, to receivethe next segment of the multi-channel stream. The operations 300 repeatuntil the last segment in the multi-channel chain is selected andwritten to non-volatile memory.

The embodiments of the disclosed technology described herein areimplemented as logical steps in one or more computer systems. Thelogical operations of the presently disclosed technology are implemented(1) as a sequence of processor-implemented steps executing in one ormore computer systems and (2) as interconnected machine or circuitmodules within one or more computer systems. The implementation is amatter of choice, dependent on the performance requirements of thecomputer system implementing the disclosed technology. Accordingly, thelogical operations making up the embodiments of the disclosed technologydescribed herein are referred to variously as operations, steps,objects, or modules. Furthermore, it should be understood that logicaloperations may be performed in any order, adding and omitting asdesired, unless explicitly claimed otherwise or a specific order isinherently necessitated by the claim language.

The above specification, examples, and data provide a completedescription of the structure and use of exemplary embodiments of thedisclosed technology. Since many embodiments of the disclosed technologycan be made without departing from the spirit and scope of the disclosedtechnology, the disclosed technology resides in the claims hereinafterappended. Furthermore, structural features of the different embodimentsmay be combined in yet another embodiment without departing from therecited claims.

What is claimed is:
 1. A method comprising: receiving a multi-channeldata stream including channel segments of multiple channels, the channelsegments of the multiple channels being intermixed with one anotheraccording to a sequential order of receipt; and writing the channelsegments of the multiple channels according to a write order than isdifferent from the sequential order of receipt.
 2. The method of claim1, wherein the sequential order of receipt includes same-channelcontinuous channel segments that are separated from one another bychannel segments of other channels.
 3. The method of claim 1, whereinwriting the channel segments according to the write order furthercomprises: for each channel of the multiple channels in themulti-channel data stream, writing continuous channel segments of thechannel to a series of physically contiguous data blocks such thatcontinuous channel data of the channel can be read back sequentiallyfrom the series of physically contiguous data blocks.
 4. The method ofclaim 1, further comprising: coalescing subsets of continuous channelsegments for each of the multiple channels in a write cache; andflushing one or more of the coalesced subsets of the continuous channelsegments from the write cache to a main store responsive to satisfactionof a coalescence condition.
 5. The method of claim 4, wherein flushingthe one or more of the coalesced subsets of the continuous channelsegments from the write cache to the main store further comprises:consecutively writing the continuous channel segments of each of thecoalesced subsets to a series physically contiguous data blocks.
 6. Themethod of claim 4, wherein the coalescence condition is satisfied when acollective data size of an individual one of the coalesced subsetssatisfies a threshold quantity.
 7. The method of claim 4, wherein thecoalescence condition is satisfied when a total quantity of data in thewrite cache exceeds a threshold and wherein flushing the one or more ofthe coalesced subsets includes flushing same-channel segments of a datachannel having a largest quantity of data in the write cache when thecoalescence condition is satisfied.
 8. A storage system comprising: amain store mapped to magnetic media storage locations; a storage devicecontroller configured to: receive a multi-channel data stream includingchannel segments of multiple channels, the channel segments of themultiple channels being intermixed with one another according to asequential order of receipt; and write the channel segments of themultiple channels to the main store according to a write order than isdifferent from the sequential order of receipt.
 9. The storage system ofclaim 8, wherein the sequential order of receipt includes same-channelcontinuous channel segments that are separated from one another bychannel segments of other channels.
 10. The storage system of claim 8,wherein the storage device controller is further configured to: for eachchannel of the multiple channels in the multi-channel data stream, writecontinuous channel segments of the channel to a series of physicallycontiguous data blocks such that continuous channel data of the channelcan be read back sequentially from the series of physically contiguousdata blocks.
 11. The storage system of claim 8, wherein the storagedevice controller is further configured to: coalesce subsets ofcontinuous channel segments for each of the multiple channels in a writecache; and flush one or more of the coalesced subsets of the continuouschannel segments from the write cache to the main store responsive tosatisfaction of a coalescence condition.
 12. The storage system of claim11, wherein the storage device controller is configured to flush thecoalesced subsets of the continuous channel segments from the writecache to the main store by consecutively writing the continuous channelsegments of each of the coalesced subsets to a series physicallycontiguous data blocks.
 13. The storage system of claim 11, wherein thecoalescence condition is satisfied when a collective data size of anindividual one of the coalesced subsets satisfies a threshold quantity.14. The storage system of claim 11, wherein the coalescence condition issatisfied when a total quantity of data in the write cache exceeds athreshold and wherein flushing one or more of the coalesced subsetsincludes flushing same-channel segments of a data channel having alargest quantity of data in the write cache when the coalescencecondition is satisfied.
 15. One or more memory devices encodingcomputer-executable instructions for executing on a computer system acomputer process comprising: receiving a multi-channel data streamincluding channel segments of multiple channels, the channel segments ofthe multiple channels being intermixed with one another according to asequential order of receipt; and writing the channel segments of themultiple channels according to a write order than is different from thesequential order of receipt.
 16. The one or more memory devices of claim15, wherein the computer process further comprises: for each channel ofthe multiple channels in the multi-channel data stream, writingcontinuous channel segments of the channel to a series of physicallycontiguous data blocks such that continuous channel data of the channelcan be read back sequentially from the series of physically contiguousdata blocks.
 17. The one or more memory devices of claim 15, wherein thecomputer process further comprises: coalescing subsets of continuouschannel segments for each of the multiple channels in a write cache; andflushing one or more of the coalesced subsets of the continuous channelsegments from the write cache to a main store responsive to satisfactionof a coalescence condition.
 18. The one or more memory devices of claim17, wherein flushing one or more of the coalesced subsets of thecontinuous channel segments from the write cache to the main storefurther comprises: consecutively writing the continuous channel segmentsof each of the coalesced subsets to a series physically contiguous datablocks.
 19. The one or more memory devices of claim 15, wherein thesequential order of receipt includes same-channel continuous channelsegments that are separated from one another by channel segments ofother channels.
 20. The one or more memory devices of claim 17, whereinthe coalescence condition is satisfied when a collective data size of anindividual one of the coalesced subsets satisfies a threshold quantity.